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PROGRAM
BSc IT
SEMESTER
SECOND
SUBJECT CODE & NAME
BT0068, Computer Organization and Architecture
Q1. Perform the following conversions:
1. (11 101 110)2 = () 8
2. (1110 0010 1111) 2 = () 16
3. (85)10 = () 2
4. (10101)2 = () 10
5. (111.001)2 = () 8
Answer:
1. (11 101 110)2 = (365)8
Q2. Differentiate between primary memory and secondary memory.
Answer:
secondary memory:
| Primary memory | Secondary memory |
| The memory devices used for primary memory are semiconductor memories | The secondary memory devices are magnetic and optical memories. |
| The primary memory is categorized as volatile and non volatile memories, RAM is the volatile memory and ROM is the non volatile memory | The secondary memory is always non volatile |
| The primary memory is composed of programs and data that are presently being used by the micro processor | The secondary memory is enough capable to store huge amount of information |
Q3. Explain CPU organization of 8085 microprocessor with diagram.
Answer:
Memory
Program, data and stack memories occupy the same memory space. The total addressable memory size is 64 KB.
Program memory – program can be located anywhere in memory. Jump, branch and call instructions use 16-bit addresses, i.e. they can be used to jump/branch anywhere within 64 KB. All jump/branch instructions use absolute addressing.
Q4. Explain fundamental Computer Architectures.
Answer:
Here we describe the most common Computer Architectures, all of which use stored program control concept.
The three most popular computer architectures are:
1) The Stack Machine
2) The Accumulator Machine
Q5. Explain direct and associative mapping functions.
Answer:
Cache Memory – Direct Mapped Cache
If each block from main memory has only one place it can appear in the cache, the cache is said to be Direct Mapped. Inorder to determine to which Cache line a main memory block is mapped we can use the formula shown below
Cache Line Number = (Main memory Block number) MOD (Number of Cache lines)
Let us assume we have a Main Memory of size 4GB (232), with each byte directly addressable by a 32-bit address. We will divide Main memory into blocks of each 32 bytes (25). Thus there are 128M (i.e. 232/25 = 227) blocks in Main memory. We have a Cache memory of 512KB (i.e. 219), divided into blocks of each 32 bytes (25). Thus there are 16K (i.e. 219/25 = 214) blocks also known as Cache slots or Cache
Q6. Explain any five addressing modes with example.
Answer:
· Immediate
· Direct
· Indirect
· Register
· Register indirect
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[ WINTER 2013 ] ASSIGNMENT
PROGRAM BSc IT
SEMESTER SECOND
SUBJECT CODE & NAME – BT0070, Operating Systems
Q. No. 1 What do you mean by batch operating system? Explain advantages and disadvantages of it.
[4+6] 10
Answer: Batch operating system
The users of batch operating system do not interact with the computer directly. Each user prepares his job on an off-line device like punch cards and submits it to the computer operator. To speed up processing, jobs with similar needs are batched together and run as a group. Thus, the programmers left their programs with the operator. The operator then sorts programs into batches with similar requirements.
2 Why do we need threads in designing of OS? Describe similarity and differences between processes and threads.
[5+5] 10
Answer: Following are some reasons why we use threads in designing operating systems.
1. A process with multiple threads make a great server. For example printer server.
2. Because threads can share common data, they do not need to use interprocess communication.
3. Because of the very nature, threads can take advantage of multiprocessors.
Threads are cheap in the sense that:
3 Explain process state with diagram.
[7+3] 10
Answer:
Process State
- There are a number of states that can be attributed to a process: indeed, the operation of a multiprogramming system can be described by a state transition diagram on the process states. The states of a process include:
- New-a process being created but not yet included in the pool of executable processes (resource acquisition).
- Ready-processes that are prepared to execute when given the opportunity.
- Active, Running-the process that is currently being executed by the CPU.
4 Explain the concept of paging with the help of an example.
[7+3] 10
Answer: In computer operating systems, paging is one of the memory-management schemes by which a computer can store and retrieve data from secondary storage for use in main memory. In the paging memory-management scheme, the operating system retrieves data from secondary storage in same-size blocks called pages. The main advantage of paging over memory segmentation is that it allows the physical address space of a process to be noncontiguous. Before paging came into use, systems had to fit whole programs into storage contiguously, which caused various storage and fragmentation problems.
5 Explain any two basic architectures for multiprocessor interconnections.
[ 5×2] 10
Answer: The base network provided in the RSIM distribution is a 2-dimensional bi-directional mesh (without wraparound connections), and is taken from the NETSIM simulation system. The interconnection network includes separate request and reply networks for deadlock-avoidance. Unlike the other subsystems discussed in this chapter, the network is not built using the standard module framework.
The network flit delay, arbitration delay, width, and buffer sizes can be configured as described in Chapter. Additionally, the system can be directed to simulate pipelined switches, by which the flit delay of
6 Explain the methods of directory implementation.
[5+5] 10
Answer: Directory Implementation
- Directories need to be fast to search, insert, and delete, with a minimum of wasted disk space.
1 Linear List
- A linear list is the simplest and easiest directory structure to set up, but it does have some drawbacks.
- Finding a file ( or verifying one does not already exist upon creation ) requires a linear search.
- Deletions can be done by moving all entries, flagging an entry as deleted, or by moving the last entry into the newly vacant position.
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[ WINTER 2013 ] ASSIGNMENT
PROGRAM B.Sc IT
SEMESTER SECOND
SUBJECT CODE & NAME – BT0071, Technical Communication
Q. No.1 Explain meaning of technical writers and also explain its role. 10
Answer:
MEANING: A technical writer is a professional writer who engages in technical writing and produces technical documentation for technical, business, and consumer audiences. The Institute of Scientific and Technical Communicators defines the profession as preparing information that helps users who use the product. This documentation includes online help, user guides/manuals, white papers, design specifications, system manuals, project plans, test plans, business correspondence, etc. Technical writers create documentation in many forms, such as printed, web-based, or other electronic means.
2 What is Audience Analysis? Explain its significance in Technical Communication. 10
Answer:
Audience analysis is a task that is often performed by technical writers in a project’s early stages. It consists of assessing the audience to make sure the information provided to them is at the appropriate level. The audience is often referred to as the end-user, and all communications need to be targeted towards the defined audience. Defining an audience requires the consideration of many factors, such as
3 Explain any five things that are needed to be kept in mind before interview. 10
Answer: Before the interview begins, there are things that you can do to build a good foundation for a productive interview experience.
Define your objectives
Define the purpose of the interview. Are you interviewing to identify problem areas within a process? Or are you documenting the steps a user performs to complete a task? Once established, the purpose will help set the scope for your interview. You should also try to establish the expected or needed level of detail for the final product. Doing so on the front-end will ensure that you ask the right questions and at the right level of detail. (For example, a policy-level document requires more general information than a work instruction, which requires more explicit step-by-step detail.)
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[ WINTER 2013 ] ASSIGNMENT
PROGRAM BSc IT
SEMESTER SECOND
SUBJECT CODE & NAME BT0072, Computer Networks
Q. No. 1 What is Computer networking? Explain LAN and WAN.
4+6=10 marks.
Answer:
A computer network or data network is a telecommunications network that allows computers to exchange data. In computer networks, networked computing devices pass data to each other along data connections. The connections (network links) between nodes are established using either cable media or wireless media. The best-known computer network is the Internet.
Network computer devices that originate, route and terminate the data are called network nodes. Nodes can include hosts such as servers and personal computers, as well as networking hardware. Two devices
2 How do you Implement packet switching? Briefly explain. 10 marks
Answer: Implementation of packet switching
For a message to be sent through a packet-switching network that is of length greater than the maximum packet size, it breaks the message up into packets and sends these packets, one at a time, to the network. A question arises as to how the network will handle this stream of packets as it attempts to route them through the network and deliver them to the intended destination. Two approaches are used in
3 What is the function of data link layer? Explain the services of the data link layer.
3+7=10 marks.
Answer:
Data Link Layer Functions:
It provides a well defined service interface to the network layer, determining how the bits of the physical layer are grouped into frames, dealing with transmission errors, regulating the flow of frames so that slow receivers are not swamped by fast senders, and general link management.
The main function of the data link layer is to provide services to the network layer. The principal service is transferring data from the network layer on the source machine to the network layer on the destination machine. The services of the data link layer can be categorized as:
4 Explain sliding window protocol. 10 marks.
Answer: In this protocol, the sliding window is an abstract concept that defines the range of sequence numbers that is the concern of the sender and receiver. The sender and the receiver need to deal with only part of the possible sequence numbers. The range which is the concern of the sender is called the send sliding window; the range that is the concern of the receiver is called the receive sliding window. Both would be discussed here.
The send window is an imaginary box covering the sequence numbers of the data frames which can be in transit. In each window position, some of these sequence numbers define the frames that have been
5 Discuss any two design issues of Session Layer.
5+5=10 marks.
Answer:
The design issues of the session layer include:
Dialog Management
In principle, all OSI connections are full duplex, i.e., PDUs can move in both directions over the same connection simultaneously. However, there are many situations in which the upper layer software is designed to expect the users to take turns (half-duplex communication).
For example, consider a database management system that can be accessed from remote terminal (e.g., airline reservation or home banking). The most natural mode of operation is for the user to send a query to the database management system and then wait for a reply. Allowing users to send a second and a third query before the first one has been answered needlessly complicates the system. Logically, it is desirable
6 Explain the types of modes on which IPSec operates.
5+5=10 marks.
Answer: IPSec operates in one of the following two modes:
1. Transport Mode
In this mode, IPSec protects what is delivered from the transport layer to the network layer. i.e. the transport mode protects the network layer payload, the payload to be encapsulated in the network layer. This mode does not protect the IP header, i.e. it protects only the packet from the transport layer (the IP layer payload). In this mode, the IPSec header and trailer are added to the information coming from the transport layer. The IP header is added later.
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